The present invention generally relates to a memory system, and more particularly, to a voltage regulator of a memory system capable of regulating a voltage, such as a voltage provided to a sector selector of the memory system.
One of the major goals in the development of semiconductor memory devices is to maximize data storage density. Thus, it is desirable to develop memory chips having the small possible physical sizes while storing a substantial amount of data. This has led to the development of memory chips that can store multiple bits of data in a single memory cell, also referred to as multilevel memory chips.
One of the main difficulties in operating multi-level nonvolatile memory cells is to accurately program the cells, that is, to provide an accurate voltage with the target value to drain ends of the cells. Many methods and systems for regulating program voltages of memory devices are proposed in the prior art. Examples include U.S. Pat. No. 5,576,990 to Camerlenghi et al., entitled “Voltage Regulator for Non-Volatile Semiconductor Memory Devices,”, U.S. Pat. No. 6,275,415 to Haddad et al., entitled “Multiple Byte Channel Hot Electron Programming Using Ramped Gate and Source Bias Voltage,”, and United States Publication No. 2006/0114721 A1 naming Frulio et al., entitled “Method and System for Regulating a Program Voltage Value during Multilevel Memory Device Programming.” However, prior art schemes for compensating the voltage drop along program paths of memory cells sometime do not provide sufficient speed and sometimes do not consider the effects all the components in the program paths. Moreover, in the example of non-volatile memories, the more times of program shots a memory cell has taken, the higher the threshold voltage of the memory cell is, and the less the program current is required. However, the variation of the program current of the memory cells, which may leads to some problems in programming the memory cells, has not been considered in the regulation method in the prior art.